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31b77bd3

Verified Commit 31b77bd3 authored 7 years ago by Ogilvie, D.H. (Duncan)

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allow ternary conditional + implement fPreNot, fPreBitCompl + better document LogicIR.Expr

parent 6f1967ff

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Changes 4

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src/LogicIR/Backend/Z3.hs 3 additions, 2 deletions

src/LogicIR/Backend/Z3.hs
src/LogicIR/Expr.hs 13 additions, 12 deletions

src/LogicIR/Expr.hs
src/LogicIR/Fold.hs 5 additions, 3 deletions

src/LogicIR/Fold.hs
src/LogicIR/Frontend/Java.hs 19 additions, 18 deletions

src/LogicIR/Frontend/Java.hs

with 40 additions and 35 deletions

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